Validating pentium 4 microprocessor

Over the last couple of days, there has been a lot of discussion about a pair of security vulnerabilities nicknamed Spectre and Meltdown.These affect all modern Intel processors, and (in the case of Spectre) many AMD processors and ARM cores.However, by executing a crafted series of branches, an attacker can mis-train a branch predictor to make poor predictions.Reordering sequential instructions is a powerful way to recover more instruction-level parallelism, but as processors become wider (able to triple- or quadruple-issue instructions) it becomes harder to keep all those pipes busy.In the good old days*, the speed of processors was well matched with the speed of memory access.

We’re going to gloss over some details (notably pipelining and register renaming) which are very important to processor designers, but which aren’t necessary to understand how Spectre and Meltdown work.Real programs aren’t like this of course: they also contain both forward branches (used to implement conditional operations like statements), and backward branches (used to implement loops).A branch may be unconditional (always taken), or conditional (taken or not, depending on a computed value); it may be direct (explicitly specifying a target address) or indirect (taking its target address from a register, memory location or the processor stack).Going back to our example, we can see that, although we have a dependency between , we have other independent instructions later in the program that we could potentially have used to fill the empty pipe during the second cycle.An out-of-order superscalar processor has the ability to shuffle the order of incoming instructions (again subject to dependencies) in order to keep its pipes busy.

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